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Analysis of si-nanowire gate all around mosfet and its design issues in digital logic

Gaurav Kaushal

Analysis of si-nanowire gate all around mosfet and its design issues in digital logic - Roorkee Department of Electronics and Computer Engineering 2013 - xiv, 146 p.

Subjects--Personal Names:
Dasgupta, S.

Subjects--Facted Index Terms:
Department of Electronics and Computer Engineering, IIT Roorkee Thesis Detial : IIT Roorkee Ph.D May 2013

Dewey Class. No.: 621.38072 /

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