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Design and simulation of cmos based delay locked loop for multiphase clock generation and its application as a programmable clock multiplier

By: Gupta, AbhayMaterial type: Text

TextPublication details: Roorkee Department of electronics and computer engineering 2008Description: xi,82p. 28cm. Index Term-UncontrolledDDC classification: 621.38072

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Holdings
Item type	Current library	Call number	Copy number	Status	Date due	Barcode
Thesis	Mahatma Gandhi Central Library	621.38072 GUP (Browse shelf(Opens below))	1	Available		G14289

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